1. Field of the Invention
The present invention relates to an organic light emitting display device, and more particularly, to an organic light emitting display device having a sampling voltage supplying unit that supplies common power supply signals to sampling latches of a data driver.
2. Description of the Related Technology
In recent years, flat panel display devices that can substitute for cathode ray tubes (CRTs) have been actively studied. In particular, owing to excellent luminance and viewing angle characteristics, organic light emitting display devices are attracting much attention as the next-generation flat panel display devices.
The organic light emitting display devices need no light source and use light emitting diodes that emit specific light, unlike liquid crystal display devices. The light emitting diodes emit light corresponding to the amount of driving current flowing into an anode electrode.
FIG. 1 is a block diagram of a conventional organic light emitting display device.
The organic light emitting display device includes a pixel portion 10, a scan driver 20, a data driver 30, and an emission control driver 40.
The pixel portion 10 includes a plurality of pixels P11 to Pnm at intersections of a plurality of scan lines S1 to Sn, a plurality of data lines D1 to Dm, and a plurality of emission control lines E1 to En, and displays given images according to an applied data voltage.
One unit pixel Pnm includes red, green and blue sub-pixels.
The red, green and blue sub-pixels in the pixel portion 10 have the same pixel circuit configuration and emit red, green and blue light corresponding to current applied to respective organic light emitting elements. The pixel Pnm combines light emitted by the red, green and blue sub-pixels, and displays a color corresponding to the combination.
The scan driver 20 sequentially supplies a scan signal to the scan lines S1 to Sn in response to scan control signals, i.e., a start pulse and a clock signal from a timing controller (not shown).
The emission control driver 40 includes a shift register and the like, and sequentially supplies an emission control signal to the emission control lines E1 to En in response to the start pulse and the clock signal from the timing controller.
The data driver 30 supplies a data voltage corresponding to R, G, B data to the data lines D1 to Dm in response to a data control signal from the timing controller.
FIG. 2 is a block diagram of a data driver for a conventional organic light emitting display device.
Referring to FIG. 2, in the conventional organic light emitting display device, a data driver 30 includes a shift register 31, a plurality of sampling latches 32, a plurality of holding latches 33, and a plurality of digital/analog converters 34.
The shift register 31 has m number outputs, and receives a control signal Dg from a timing controller to sequentially supply an output signal. One output signal of the shift register 31 is supplied in common to n number of sampling latches 32, which constitute one data driving circuit.
The sampling latches 32 receive a digital image signal (R, G and B data) from the timing controller and sample the digital image signal into one-bit data. When one analog data signal represents 64 gradations, six (n=6) sampling latches 32 constitute one data driving circuit. These six sampling latches 32 receive the digital image signals (R, G and B data) from the timing controller and simultaneously receive one output signal from the shift register 31. Each sampling latch 32 samples the digital image signal by one-bit data in response to the applied output signal of the shift register 31.
The holding latches 33 receive and store the sampled one-bit data from each sampling latch 32, and supply the stored one-bit data to the digital/analog converter 34 in response to a holding control signal EN of the timing controller.
When one data driving circuit includes six sampling latches 32, six holding latches 33 are also provided. The holding control signal EN supplied from the timing controller is simultaneously supplied to the 6 holding latches 33. After each of the m number of output signals from the shift register 31 are supplied to the sampling latches 32, the holding control signal EN from the timing controller is supplied to the holding latches 33.
The digital/analog converter 34 receives the stored data from the six holding latches 33, converts the stored data to an analog voltage value corresponding to gradations represented by 6-bit data, and outputs the analog data signal to the data line Dm.
In the data driver 30 described above, one output signal from the shift register 31 is supplied to the six sampling latches 32 in common. Each sampling latch 32 includes a switching unit for connecting or disconnecting a power supply voltage with a latch unit in response to the output signal of the shift register 31. This increases the area occupied by each sampling latch 32 and, and in turn, reduces the area occupied by the pixel portion 10 in a panel.